74166 8-Bit Parallel-Load Shift Register

Ürün Açıklaması

74166,8-bit parallel-load serial-out shift-register.The circuit consists of 8 edge-triggered D-type flipflops and a few gates connecting the flipflops. The/CLRinput allows resetting the register. TheCLKandCLK_INHinputs are connected via an OR-gate to the clock inputs of the flipflops. Therefore, either input can be used as the clock signal, and tying one of those inputs to high will disable the register.WhenSH/nLDis high, the register contents is shifted on the rising clock edge, with the first flipflop loaded from theSERserial input. Only the output from the last flipflop is connected to theQ7(QH) output pin.WhenSH/nLDis low, the register contents is loaded from the eight data inputsD0..D7(also called A..H) on the rising clock edge.74166 Datasheet